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CVE-2023-5138Glitch detection not active by default in Silicon Labs Secure Vault High devices

Description

Glitch detection is not enabled by default for the CortexM33 core in Silicon Labs secure vault high parts EFx32xG2xB, except EFR32xG21B.

Timeline

  1. ID reserved

    By Silabs

  2. · 3 months later

    Published

  3. · 17 months later

    Record updated

Changes after publication (a new score, a public exploit, EPSS crossing 1, 10 or 50 %, leaving KEV) are kept since November 2026; earlier ones are not known.

Scores

CVSS scores of CVE-2023-5138, by who scored it
Scored byCVSSScoreVector
SilabsCNA (assigner)3.1Medium6.8CVSS:3.1/AV:P/AC:L/PR:N/UI:N/S:U/C:H/I:H/A:H
NVDNVD · Modified3.1Medium6.8CVSS:3.1/AV:P/AC:L/PR:N/UI:N/S:U/C:H/I:H/A:H
EPSS (exploitation in 30 days)
0.27% · top 80% of all CVEs (14 Nov 2026)
CISA SSVC
Exploitation: none · Automatable: no · Technical impact: total
Loading the EPSS history…

The list uses the assigner's score when there is one, then CISA's, then NVD's: Medium 6.8.

Affected products

References

References2

Sources

The same CVE in the primary databases and aggregators, to check against.

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Record last updated .